Department of Electrical and Computer Engineering
University of Wisconsin - Madison
ECE/Comp Sci 352 Digital System Fundamentals
COURSE OUTLINE

Spring 2003
Last Updated: February 13, 2002

This is a tentative course outline. Changes will be announced in class or updated outlines will be posted on the course website for your section. Since each lecture is 75 minutes long, 40 lectures are scheduled for this 4-credit course.

Dates (# lectures)	Description	Notes & Assignments
Week 1 1/22, 24 (2)	About the course description, conduct, outline Introduction, number systems, base conversions, arithmetic operations for bases other than 10, binary codes	1.1-1.4 Start HW 1
		Attend Unix Tutorial (CAE)
Week 2 1/27, 29, 31 (3)	Gray code, alphanumeric codes, parity bit, binary logic, logic gates, Boolean algebra, algebraic manipulations, complements of functions, canonical forms, standard forms (Sum of Products, Product of Sums), Karnaugh maps	Supplement 1, 1.5-1.6, 2.1-2.4
		Attend Unix Tutorial (CAE) Sign up for Mentor Tutorial
Week 3 2/3, 5, 7 (3)	Systematic Boolean simplification using K-maps, prime implicants, don't cares, NAND and NOR 2-level, tabular methods, Multi-level realization, XOR gates, parity functions,	Supplement 2, 2.4-2.8 Start HW 2 Sign up and attend Mentor Tutorial
Week 4 2/10, 12, 14 (3) 2/13 Thursday	combinational circuits, combinatorial logic analysis and design procedures, code converters, decoders, encoders, multiplexers and demultiplexers	3.1 - 3.8 Sign up and attend Mentor Tutorial
	7:15-8:30 PM, QUIZ 1 (covers through Chap. 2, Supp. 1&2)	Location: Room 1800 EH 7:15-8:30pm
Week 5 2/17, 19, 21 (3)	Adders, ripple-carry adders, carry-lookahead adders, subtraction, complements, signed representations, signed arithmetic, overflow, binary multipliers, decimal arithmetic,Verilog representation	3.8 - 3.12, 3.14 Start HW 3
Week 6 2/24, 26, 28 (3)	introduction to sequential circuits, latches, flip-flops, timing characteristics,	4.1 - 4.3 Begin Project 1 (2/24)
Week 7 3/3, 5, 7 (3) 3/6 Thursday	Sequential circuit analysis, state tables, state diagram, state diagrams, flip-flop input equations, analysis examples	4.4 Start HW 4
	7:15-8:30 PM, QUIZ 2(covers through sec. 3.12)	Location: Ag125 7:15-8:30pm
Week 8 3/10, 12, 14 (3)	Sequential circuit design. flip-flop excitation table,	4.5-4.7, 4.9, Supplement 3
	Project Help Sessions 3/11, 12 (7-9pm, B555 EH) Project 1 due on Friday 3/14 in class
3/17 - 3/23	Spring Recess (no lectures)
Week 9 3/24, 26, 28 (3)	Verilog representations, state diagrams, sequential circuit design.	4.5-4.7, 4.9, Supplement 3
Week 10 3/31, 4/2, 4 (3) 4/3 Thursday	Registers, shift registers, ripple counters, synchronous binary counters, other counters, HDL representations	5.1-5.6, 5.8 Start HW 5 (11/08)
	7:15-8:30 PM, QUIZ 3 (covers through Chap.5 & Supp. 3)	Location: Ag125 7:15-8:30pm
Week 11 4/7, 9, 11 (3)	Asynchronous timing considerations. Micro-operations, register transfer operations, three-state buffers, MUX-based and bus-based transfers, memory transfer	Supplement 4, 7.1-7.5 Start HW 6, Begin Project 2 (4/7)
Week 12 4/14, 16, 18 (3)	Register files, ALU, shifter, datapath organization. datapath operations, microinstructions, control word, control unit, ASM chart, binary multiplication	7.6-7.10, 8.1-8.3
Week 13 4/21, 23, 25 (3) 4/24 Thursday	Hardwired control, Multiple-cycle microprogrammed control	8.4, 8.5 Start HW 7
	7:15-8:30 PM, Quiz 4 (covers through sec. 8.3 & Supp. 4)	Location: Room 1800 EH 7:15-8:30pm
Week 14 4/28, 30, 5/2 (3)	HDL descriptions of control, simple computer architecture, instruction format, single cycle hardware control, memory organization, and memory timing, ROM, PLA, PAL	8.5-8.9, Start HW 8, 6.1-6.8
	Project Help Sessions: 4/29, 4/30 (7-9pm, B555 EH) Project 2 due on Friday 5/2
Week 15 5/5, 7, 9 (3)	Catch up, final exam review, course evaluation
5/15 Thursday	5:05 PM - 7:05 PM FINAL EXAMINATION	Location: BioChem 125 5:05-7:05pm