| Research Interests |
Networked Embedded Systems, Wireless Sensor Networks, Smart Spaces and Environment Control, Automated Design Space Exploration, Application Specific Compilation, Watermarking and Computational Security.
|
| Education |
- 2000 - 2005 University of California, Los Angeles
Ph.D. in Computer Science, Advisor: Professor Miodrag Potkonjak
Thesis: "Sensor Coverage in Wireles Sensor Networks"
- 1998 - 1999 University of California, Los Angeles
M.S. Degree in Computer Science - Major field of study: System Architecture
- 1994 - 1998 University of California, Los Angeles
B.S. Degree in Computer Science And Engineering
|
| Honors and Awards |
- June 2005: Honorable Mention - 2005 FreeScale Wireless Design Challenge - Jacob Adriaens and Seapahn Megerian, HAXOR: Home Automation and Observation Remote
- 2002-2003: Intel Ph.D. Fellowship Recipient
- July 2001: Best Student Paper award as the primary author for the paper titled "Exposure in Wireless Ad Hoc Sensor Networks" presented at the 7th International Conference on Mobile Computing and Networking (MobiCom '01) in Rome, Italy.
|
| Publications |
|
| Patents |
- Seapahn Megerian, Miodrag Potkonjak, Dusan Petranovic, Advait Mogre. "Multi-Resolution Viterbi Decoding Technique". US patent application filed, April 2002.
- Seapahn Megerian, Miodrag Potkonjak, Dusan Petranovic, Advait Mogre. "Metacore Design and Optimization Technique". US patent application filed, December 2002.
|
| Software |
- Simulator: Multiresolution Viterbi Decoder
User friendly simulator software enables advanced research in Viterbi Decoder algorithm design which is widely used in digital communication receivers.
(used at LSI Logic)
- Package: Sensor Networks Coverage Algorithms
- Coverage calculation and experimentation platform for wireless sensor networks including: worst- and best-case coverage, exposure-based methods, deployment optimization, path planning, etc.
- Interactive tools used in research for coverage and deployment analysis algorithms in sensor networks such as best- and worst-case coverage, exposure, and minimal exposure paths.
- Localized exposure calculation package implemented and tested on Sensoria nodes utilizing the Hitachi SH4 processor (linux-based).
|
Professional
Experience |
- Aug 2003-Present University of Wisconsin Madison
Assistant Professor - Electrical and Computer Engineering Department
- 2000-2002 LSI Logic Corporation, Milpitas, CA
Consultant (see below)
- 2000 LSI Logic Corporation, Milpitas, CA
Summer Intern, D-Channel Coding Group
Study and analysis of architectural feasibility, performance, and cost tradeoffs of programmable / re-configurable architectures for digital cable and terrestrial communication receivers including: Viterbi Decoders, timing and carrier recovery, etc.
- 1998 - 1999 Delphi Automotive Systems (HRL) Malibu, CA
Digital Circuit and Control Software Designer
- Adaptive Cruise Control (ACC) project - responsible for designing hardware and software for an LCD module to serve as the user interface to the ACC and enable the configuration of laser and radar tracking systems.
- Vision Project - designed and implemented an IEEE 1394 (Firewire) interface for a digital video camera with a large dynamic range for automotive applications (200 Mbps uncompressed video).
- 1995 - 1998 Marconi Astronics Inc, Santa Monica, CA
Telecommunications Intern
Communication traffic analysis and programming / optimization of company telephone system based on Northern Telecom (NT) Meridian 61 switch.
|
| Teaching |
- ECE 537 - Communication Networks - Spring 2005
- ECE 902 - Networked Embedded Systems - Fall 2005
- ECE 537 - Communication Networks - Spring 2004
- ECE 554 - Digital Engineering Laboratory - Fall 2003
|
| Other |
- Expert C/C++ programmer
- Extensive hardware level experience with Intel x86-based PCs, Intel StrongArm processors, LSI Logic ZSP processors, and Lattice In-System Programmable (ISP) chips.
- Extensive experience with IEEE 1394 (Firewire) protocol and hardware (mostly with Texas Instrument PHY and link layer chips).
|
