Department of Electrical and Computer Engineering
University of Wisconsin - Madison
ECE 554 Digital Engineering Laboratory
COURSE CONDUCT
Fall 2005
1. OBJECTIVES:
1) Deal with problems and solutions associated with many aspects of a large digital design project,
2) Work effectively as a member of a moderate-sized team,
3) Use contemporary commercial design tools, and
4) Use programmable, user-defined devices for rapid prototyping.
2. PREREQUISITES: ECE 351, ECE/CS 552.

3. TEXTBOOK: Handouts, materials, and manuals on-line.

4. INSTRUCTORS:

Seapahn Megerian, 3423 EH, megerian@engr.wisc.edu
Office hours: TBD

Jake Adriaens: jtadriaens@wisc.edu
Office hours are assigned lab hours.

Ben Kopp: bjkopp@wisc.edu
Office hours are assigned lab hours.

4. LOCATIONS:

Laboratory: Room 3628 Engineering Hall (Phone in attached room 3654: 265-3803 - Campus Only)
Lectures: Room 3444 EH (W 12:05 PM)
Lectures, Design Reviews, and Group Meetings: Room 3444 EH (MW) and 3418 EH (TR) during lab hours, marked C on outline.

5. PROJECT: The project is to design, implement, test, and program a general or special purpose digital computer, usually emphasizing some particular features. Project groups are seven to nine in size. Teamwork and realistic project scheduling and monitoring are emphasized.

6. GRADING POLICY: 15% Lab Exercises; 20% Midterm/Bench Exam; 65% Project; No Final Exam.

7. USEFUL LINKS: Link to 554 website - Spring 2005

8. TENTATIVE OUTLINE:

Week
 Date
Section
Topic or Activity
;nbsp;;nbsp;;nbsp;;nbsp;
1
9/7
 Lec Course Introduction
9/7
 Lab 1 C FPGA Concepts and Design
9/8
 Lab 2 C FPGA Concepts and Design
;nbsp;;nbsp;;nbsp;;nbsp;
2
9/12
 Lab 1 FPGA Design Tutorial, Lab Team Setups
9/13
 Lab 2 FPGA Design Tutorial, Lab Team Setups
9/14
 Lec Laboratory Environment, Miniproject Assignment
9/14
 Lab 1 Mini Organization
9/15
 Lab 2 Mini Organization
;nbsp;;nbsp;;nbsp;;nbsp;
3
9/19
 Lab 1 Mini Logic Design and Entry
9/20
 Lab 2 Mini Logic Design and Entry
9/21
 Lec Working in Teams
9/21
 Lab 1 Mini Simulation
9/22
 Lab 2 Mini Simulation
;nbsp;;nbsp;;nbsp;;nbsp;
4
9/26
 Lab 1 Mini Lab Work
9/27
 Lab 2 Mini Lab Work
9/28
 Lec Course Project Assignment
9/28
 Lab 1 Catchup, Architecture Meeting
9/29
 Lab 2 Catchup, Architecture Meeting
;nbsp;;nbsp;;nbsp;;nbsp;
5
10/3
 Lab 1 Architecture Meeting, PR 1
10/4
 Lab 2 Architecture Meeting, PR 1
10/5
 Lec --
10/5
 Lab 1 Architecture Meeting
10/6
 Lab 2 Architecture Meeting
;nbsp;;nbsp;;nbsp;;nbsp;
6
10/10
 Lab 1 Architecture Review
10/11
 Lab 2 Architecture Review
10/12
 Lec Register Files and Memory
10/12
 Lab 1 Microarchitecture Meeting
10/13
 Lab 2 Microarchitecture Meeting
;nbsp;;nbsp;;nbsp;;nbsp;
7
10/17
 Lab 1 Microarchitecture Meeting, PR 2
10/18
 Lab 2 Microarchitecture Meeting, PR 2
10/19
 Lec --
10/19
 Lab 1 Midterm/Bench Exam, Microarchitecture Meeting
10/20
 Lab 2 Midterm/Bench Exam, Microarchitecture Meeting
;nbsp;;nbsp;;nbsp;;nbsp;
8
10/24
 Lab 1 Microarchitecture Meeting
10/25
 Lab 2 Microarchitecture Meeting
10/26
 Lec --
10/26
 Lab 1 Logic Design & Entry
10/27
 Lab 2 Logic Design & Entry
;nbsp;;nbsp;;nbsp;;nbsp;
9
10/31
 Lab 1 Logic Design & Entry
11/1
 Lab 2 Logic Design & Entry
11/2
 Lec --
11/2
 Lab 1 Logic Design & Simulation
11/3
 Lab 2 Logic Design & Simulation
;nbsp;;nbsp;;nbsp;;nbsp;
10
11/7
 Lab 1 Microarchitecture Review
11/8
 Lab 2 Microarchitecture Review
11/9
 Lec --
11/9
 Lab 1 Subsystem Design & Simulation, PR 3
11/10
 Lab 2 Subsystem Design & Simulation, PR 3
;nbsp;;nbsp;;nbsp;;nbsp;
11
11/14
 Lab 1 System Design & Entry
11/15
 Lab 2 System Design & Entry
11/16
 Lec --
11/16
 Lab 1 System Simulation, PR 4
11/17
 Lab 2 System Simulation, PR 4
;nbsp;;nbsp;;nbsp;;nbsp;
12
11/21
 Lab 1 System Simulation & Debug
11/22
 Lab 2 System Simulation & Debug
11/23
 Lec --
11/23
 Lab 1 Hardware Test & Debug, PR 5
11/24
 Lab 2 Hardware Test & Debug, (Thanksgiving) PR 5
;nbsp;;nbsp;;nbsp;;nbsp;
13
11/28
 Lab 1 Hardware Test & Debug
11/29
 Lab 2 Hardware Test & Debug
11/30
 Lec --
11/30
 Lab 1 Demonstration Preparation
12/1
 Lab 2 Demonstration Preparation
;nbsp;;nbsp;;nbsp;;nbsp;
14
12/5
 Lab 1 Software Test & Debug
12/6
 Lab 2 Software Test & Debug
12/7
 Lec Final Charge and Course Evaluation
12/7
 Lab 1 Software Completion, PR 6
12/8
 Lab 2 Software Completion, PR 6
;nbsp;;nbsp;;nbsp;;nbsp;
15
12/12
 Lab 1 Project - Demonstration
12/13
 Lab 2 Project - Demonstration
12/14
 Lec --
12/14
 Lab 1 Feedback (optional)
12/15
 Lab 2 Feedback (optional)
;nbsp;;nbsp;;nbsp;;nbsp;
16
12/21
 All
Final Project Report Due:
Wednesday 2:30 PM