K. Compton, S. Hauck, "Routing Segmentation in Reconfigurable Devices", to be submitted.
K. Compton, S. Hauck, "Automatic Design of Reconfigurable Domain-Specific Flexible Cores", IEEE Transactions on VLSI Systems, pp. 493-503, v. 16, No. 5, May 2008.
A. Sharma, K. Compton, C. Ebeling, S. Hauck, "Exploration of RaPiD-style Pipelined FPGA Interconnects", submitted to IEEE Transactions on VLSI.
W. Fu, K. Compton, "Scheduling Intervals for Reconfigurable Computing", IEEE Symposium on Field-Programmable Custom Computing Machines, April 2008.
J. Evans, K. Rupnow, K. Compton, "Reconfigurable Functional Units for Scientific Superscalar Processors", IEEE International Conference on Field-Programamble Technology, pp. 73-80, December 2007.
P. Garcia, K. Compton, "A Reconfigurable Hardware Interface for a Modern Computing System", IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 73-84, April 2007.
K. Rupnow, K. Underwood, K. Compton, "Scientific Application Acceleration with Reconfigurable Functional Units", IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 261-274, April 2007.
W. Fu, K. Compton, "A Simulation Platform for Reconfigurable Computing Research" (PDF), IEEE International Conference on Field Programmable Logic and Applications, August 2006.
K. Rupnow, A. Rodrigues, K. Underwood, K. Compton, "Scientific Applications vs. SPEC-FP: A Comparison of Program Behavior" (PDF), ACM/SIGARCH International Conference on Supercomputing, June 2006.
W. Fu, K. Compton, "An Execution Environment for Reconfigurable Computing" (PDF), IEEE Symposium on Field-Programmable Custom Computing Machines, 2005.
K. Compton, S. Hauck, "Flexibility Measurement of Domain-Specific Reconfigurable Hardware" (PDF), ACM/SIGDA Symposium on Field-Programmable Gate Arrays, 2004.
A. Sharma, K. Compton, C. Ebeling, S. Hauck, "Exploration of Pipelined FPGA Interconnect Structures" (PDF), ACM/SIGDA Symposium on Field-Programmable Gate Arrays, 2004.
K. Compton, S. Hauck, "Track Placement: Orchestrating Routing Structures to Maximize Routability" (PDF)(Expanded Technical Report PDF), International Conference on Field Programmable Logic and Applications, 2003.
K. Compton, A. Sharma, S. Phillips, S. Hauck, "Flexible Routing Architecture Generation for Domain-Specific Reconfigurable Subsystems" (PDF), International Conference on Field Programmable Logic and Applications, 2002.
K. Compton, S. Hauck, "Totem: Custom Reconfigurable Array Generation" (PDF), IEEE Symposium on FPGAs for Custom Computing Machines, 2001.
Z. Li, K. Compton, S. Hauck, "Configuration Caching for FPGAs" (PDF), IEEE Symposium on FPGAs for Custom Computing Machines, 2000.
Theses
K. Compton, Architecture Generation of Customized Reconfigurable Hardware(PDF), PhD Thesis, Northwestern University, Department of ECE, December 2003.
K. Compton, Programming Architectures for Run-Time Reconfigurable Systems(PDF), MS Thesis, Northwestern University, Department of ECE, December 1999.
Student Theses
K. Rupnow, Scientific Applications vs. SPEC-FP: A Comparison of Program Behavior,
University of Wisconsin-Madison, Department of ECE, January 2006.
S. Jamkar, Arithmetic Arrays for Reconfigurable Fabrics, (PDF), MS Thesis, University of Wisconsin-Madison, Department of ECE, January 2005.
Miscellaneous Articles
K. Compton, S. Hauck, "The Totem Project", EETimes, September 16, 2002.
W. Fu, K. Compton, "An Execution Environment for Reconfigurable Computing", ACM/SIGDA International Symposium on FPGAs, 2005.
K. Compton, S. Hauck, "Track Placement: Orchestrating Routing Structures To Maximize Routability (Abstract)" (PDF), ACM/SIGDA International Symposium on FPGAs, 2003.
K. Compton, J. Cooley, S. Knol, S. Hauck, "Abstract: Configuration Relocation and Defragmentation for FPGAs" (PDF)(Expanded Technical Report PDF), IEEE Symposium on FPGAs for Custom Computing Machines, 2000.
Technical Reports
K. Compton, S. Hauck, "Track Placement: Orchestrating Routing Structures to Maximize Routability" (PDF), University of Washington, Dept. of EE Technical Report UWEETR-2002-0013, 2002.
K. Compton, J. Cooley, S. Knol, S. Hauck, "Configuration Relocation and Defragmentation for FPGAs" (PDF), Northwestern University, Dept. of ECE Technical Report, 2000.
K. Compton, S. Hauck, "An Introduction to Reconfigurable Computing" (PDF), Northwestern University, Dept. of ECE Technical Report, 1999.
K. Compton, S. Hauck, "Mapping Methods for the Chimaera Reconfigurable Functional Unit", Northwestern University, Dept. of ECE Technical Report, 1997.