Martin Langhammer
Architect, Altera European Technology Center
http://www.altera.com

Martin Langhammer has B.A.Sc in EE from the University of Toronto and 19 years of industry experience spanning sales to engineering in FPGA architecture, DSP applications and IC Design. He founded the company Hammercores, a specialist provider of FPGA and ASIC IP for DSP and error correction applications, which was acquired by Altera in 1999. Since then he has been an Architect with Altera working on FPGA silicon architecture and IP R&D in the areas of DSP and security. He was the lead architect of the Stratix devices DSP blocks, and most recently developed a new compiler for accelerating floating point operations on FPGAs. Martin has 32 issued US patents, and serves on the program committees for ISFPGA, FPL, and RSSI.

David Kirk
Chief Scientist
NVIDIA
http://www.nvidia.com/

Dr. David Kirk has been NVIDIA's Chief Scientist since January 1997. His contribution includes leading NVIDIA graphics technology development for today’s most popular consumer entertainment platforms. In 2006, Dr. Kirk was elected to the National Academy of Engineering (NAE) for his role in bringing high-performance graphics to personal computers. Election to the NAE is among the highest professional distinctions awarded in engineering. In 2002, Dr. Kirk received the SIGGRAPH Computer Graphics Achievement Award for his role in bringing high-performance computer graphics systems to the mass market. From 1993 to 1996, Dr. Kirk was Chief Scientist, Head of Technology for Crystal Dynamics, a video game manufacturing company. From 1989 to 1991, Dr. Kirk was an engineer for the Apollo Systems Division of Hewlett-Packard Company. Dr. Kirk is the inventor of 50 patents and patent applications relating to graphics design and has published more than 50 articles on graphics technology. Dr. Kirk holds B.S. and M.S. degrees in Mechanical Engineering from the Massachusetts Institute of Technology and M.S. and Ph.D. degrees in Computer Science from the California Institute of Technology.

Mike Butts
Ambric Fellow
Ambric, Inc.
http://www.ambric.com/

Mike Butts has an extensive background in computer architecture and reconfigurable hardware systems, and is the co-inventor of hardware logic emulation using FPGAs, which became a $100M/year market. He has developed several processor architectures, reconfigurable chips and systems, at Mentor Graphics, Quickturn, Synopsys, Cadence, Tabula, which he co-founded, and Ambric. Mike has 35 US patents issued, has served on the Technical Program Committees of the FPGA, FCCM and FPL conferences, and has BSEE and MSEE/CS degrees from MIT.

Fabrizio Petrini
Cell Solutions Department
IBM TJ Watson Research Center
http://hpc.pnl.gov/people/fabrizio/

Dr. Fabrizio Petrini is with the Cell Solutions Department at IBM's TJ Watson Research Center. He has been actively involved in parallel systems work, holding positions at Los Alamos National Labs, Pacific Northwest National Labs, Oxford University Computing Laboratory, UC-Berkeley ICSI, and HP Labs. He has been actively involved in the organization of Hot Interconnects, serving recently as technical co-chair. He is also recipient of two Best Paper Awards, one at Supercomputing 2003 and another at IPDPS 2003.

Dr. Petrini holds the PhD and Laurea degrees in Computer Science from Universita di Pisa.

Thomas Sterling
Department of Computer Science &
Center for Computation & Technology
Louisiana State University
http://www.cct.lsu.edu/~tron/

Dr. Thomas Sterling is the Arnaud & Edwards Professor at the Louisiana State University Department of Computer Science and a faculty member at the Center for Computation and Technology. In addition, he holds the positions of Faculty Associate at the California Institute of Technology Center for Adavanced Computing Research and Distinguished Visiting Scientist at the Oak Ridge National Laboratory. Since receiving his Ph.D. from MIT as a Hertz Fellow in 1984, Dr. Sterling has engaged in a wide range of applied research associated with high performance computer systems architecture and software. He is widely recognized for his contributions in cluster computing through his leadership of the Beowulf Project (for which he was one of several to win the Gordon Bell Prize in 1997) and for his work in Petaflops scale system architecture through the HTMT and Cascade HPCS system projects and the DIVA and Gilgamesh processor in memory (PIM) architecture projetcs. He is currently developing the ParalleX Model for future generation parallel computing and is co-investigator on DOE, NSF, and NASA sponsored research projects. Dr. Sterling holds six patens and is the co-author of five books in the field.